SN54ABT16623, sn74abt16623 16-bit bus transceivers with 3-state outputs scbs211b february 1991 revised january 1997 1 post office box 655303 ? dallas, texas 75265 members of the texas instruments widebus ? family state-of-the-art epic- ii b ? bicmos design significantly reduces power dissipation latch-up performance exceeds 500 ma per jedec standard jesd-17 typical v olp (output ground bounce) < 1 v at v cc = 5 v, t a = 25 c distributed v cc and gnd pin configuration minimizes high-speed switching noise flow-through architecture optimizes pcb layout high-drive outputs (32-ma i oh , 64-ma i ol ) package options include plastic 300-mil shrink small-outline (dl) and thin shrink small-outline (dgg) packages and 380-mil fine-pitch ceramic flat (wd) package using 25-mil center-to-center spacings description the 'abt16623 are 16-bit transceivers designed for asynchronous communication between data buses. the control-function implementation allows for maximum flexibility in timing. the 'abt16623 provide true data at the outputs. these devices can be used as two 8-bit transceivers or one 16-bit transceiver. they allow data transmission from the a bus to the b bus or from the b bus to the a bus, depending on the logic levels at the output-enable (oeab and oeba ) inputs. the output-enable inputs can be used to disable the device so that the buses are effectively isolated. the dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling oeab and oeba . each output reinforces its input in this configuration. when both oeab and oeba are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (32 total) remain at their last states. copyright ? 1997, texas instruments incorporated unless otherwise noted this document contains production data information current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. widebus and epic- ii b are trademarks of texas instruments incorporated. SN54ABT16623 . . . wd package sn74abt16623 . . . dgg or dl package (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1oeab 1b1 1b2 gnd 1b3 1b4 v cc 1b5 1b6 gnd 1b7 1b8 2b1 2b2 gnd 2b3 2b4 v cc 2b5 2b6 gnd 2b7 2b8 2oeab 1oeba 1a1 1a2 gnd 1a3 1a4 v cc 1a5 1a6 gnd 1a7 1a8 2a1 2a2 gnd 2a3 2a4 v cc 2a5 2a6 gnd 2a7 2a8 2oeba
SN54ABT16623, sn74abt16623 16-bit bus transceivers with 3-state outputs scbs211b february 1991 revised january 1997 2 post office box 655303 ? dallas, texas 75265 description (continued) to ensure the high-impedance state during power up or power down, oeba should be tied to v cc through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. oeab should be tied to gnd through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. the SN54ABT16623 is characterized for operation over the full military temperature range of 55 c to 125 c. the sn74abt16623 is characterized for operation from 40 c to 85 c. function table (each 8-bit section) inputs operation oeba oeab operation l l b data to a bus l h b data to a bus, a data to b bus h l isolation h h a data to b bus logic symbol 2 2 this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12. 2oeba 1oeba en1 48 en2 1 1oeab 1a2 46 1a3 44 1a4 43 1a5 41 1a6 40 1a7 38 1a8 37 1a1 47 1b1 2 1b2 3 1b3 5 1b4 6 1b5 8 1b6 9 1b7 11 1b8 12 en3 25 en4 24 2oeab 2a2 35 2a3 33 2a4 32 2a5 30 2a6 29 2a7 27 2a8 26 2a1 36 2b1 13 2b2 14 2b3 16 2b4 17 2b5 19 2b6 20 2b7 22 2b8 23 1 12 1 1 14 3
SN54ABT16623, sn74abt16623 16-bit bus transceivers with 3-state outputs scbs211b february 1991 revised january 1997 3 post office box 655303 ? dallas, texas 75265 logic diagram (positive logic) to seven other channels 48 1 47 2 1oeba 1oeba 1oeba 1b1 to seven other channels 25 24 36 13 2oeba 2oeba 2oeba 2b1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 2 supply voltage range, v cc 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (except i/o ports) (see note 1) 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . voltage range applied to any output in the high or power-off state, v o 0.5 v to 5.5 v . . . . . . . . . . . . . . . . . . . current into any output in the low state, i o : SN54ABT16623 96 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . sn74abt16623 128 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0) 18 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, q ja (see note 2): dgg package 89 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dl package 94 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observe d. 2. the package thermal impedance is calculated in accordance with eia/jedec std jesd51. recommended operating conditions (see note 3) SN54ABT16623 sn74abt16623 unit min max min max unit v cc supply voltage 4.5 5.5 4.5 5.5 v v ih high-level input voltage 2 2 v v il low-level input voltage 0.8 0.8 v v i input voltage 0 v cc 0 v cc v i oh high-level output current 24 32 ma i ol low-level output current 48 64 ma d t/ d v input transition rise or fall rate outputs enabled 5 5 ns/v t a operating free-air temperature 55 125 40 85 c note 3: unused pins (input or i/o) must be held high or low to prevent them from floating. product preview information concerns products in the formative or design phase of development. characteristic data and other specifications are design goals. texas instruments reserves the right to change or discontinue these products without notice.
SN54ABT16623, sn74abt16623 16-bit bus transceivers with 3-state outputs scbs211b february 1991 revised january 1997 4 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions t a = 25 c SN54ABT16623 sn74abt16623 unit parameter test conditions min typ 2 max min max min max unit v ik v cc = 4.5 v, i i = 18 ma 1.2 1.2 1.2 v v cc = 4.5 v, i oh = 3 ma 2.5 2.5 2.5 v oh v cc = 5 v, i oh = 3 ma 3 3 3 v v oh v cc =45v i oh = 24 ma 2 2 v v cc = 4 . 5 v i oh = 32 ma 2* 2 v ol v cc =45v i ol = 48 ma 0.55 0.55 v v ol v cc = 4 . 5 v i ol = 64 ma 0.55* 0.55 v v hys 100 mv i i control inputs v cc = 5.5 v, v i = v cc or gnd 1 1 1 m a i a or b ports cc , icc 100 100 100 m i ozh 3 v cc = 5.5 v, v o = 2.7 v 50 50 50 m a i ozl 3 v cc = 5.5 v, v o = 0.5 v 50 50 50 m a i off v cc = 0, v i or v o 4.5 v 100 100 m a i cex v cc = 5.5 v, v o = 5.5 v outputs high 50 50 50 m a i o v cc = 5.5 v, v o = 2.5 v 50 100 180 50 180 50 180 ma v cc = 5.5 v, outputs high 2 2 2 i cc a or b ports v cc = 5 . 5 v , i o = 0, outputs low 35 35 35 ma v i = v cc or gnd outputs disabled 2 2 2 ? data inp ts v cc = 5.5 v, one input at 3.4 v, outputs enabled 1 1.5 1 d i cc ? d ata i nputs , other inputs at v cc or gnd outputs disabled 0.05 0.05 0.05 ma control inputs v cc = 5.5 v, one input at 3.4 v, other inputs at v cc or gnd 1.5 1.5 1.5 c i control inputs v i = 2.5 v or 0.5 v 3 pf c io a or b ports v o = 2.5 v or 0.5 v 8 pf * on products compliant to mil-prf-38535, this parameter does not apply. 2 all typical values are at v cc = 5 v. 3 the parameters i ozh and i ozl include the input leakage current. not more than one output should be tested at a time, and the duration of the test should not exceed one second. ? this is the increase in supply current for each input that is at the specified ttl voltage level rather than v cc or gnd. product preview information concerns products in the formative or design phase of development. characteristic data and other specifications are design goals. texas instruments reserves the right to change or discontinue these products without notice.
SN54ABT16623, sn74abt16623 16-bit bus transceivers with 3-state outputs scbs211b february 1991 revised january 1997 5 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, c l = 50 pf (unless otherwise noted) (see figure 1) parameter from (input) to (output) v cc = 5 v, t a = 25 c SN54ABT16623 sn74abt16623 unit (input) (output) min typ max min max min max t plh aorb bora 1 2 3.2 1 3.7 1 3.6 ns t phl a or b b or a 1 2.2 3.4 1 4.4 1 4.3 ns t pzh oeba or oeab aorb 1.1 3 4 1.1 5 1.1 4.9 ns t pzl oeba or oeab a or b 1.4 3.3 4.9 1.4 6.2 1.4 6 ns t phz oeba or oeab aorb 1 3.5 4.9 1 6.2 1 6 ns t plz oeba or oeab a or b 1.4 2.8 4.7 1.4 5.6 1.4 5.4 ns product preview information concerns products in the formative or design phase of development. characteristic data and other specifications are design goals. texas instruments reserves the right to change or discontinue these products without notice.
SN54ABT16623, sn74abt16623 16-bit bus transceivers with 3-state outputs scbs211b february 1991 revised january 1997 6 post office box 655303 ? dallas, texas 75265 parameter measurement information 1.5 v t h t su from output under test c l = 50 pf (see note a) load circuit s1 7 v open gnd 500 w 500 w data input timing input 1.5 v 3 v 0 v 1.5 v 1.5 v 3 v 0 v 3 v 0 v 1.5 v t w input voltage waveforms setup and hold times voltage waveforms propagation delay times inverting and noninverting outputs voltage waveforms pulse duration t plh t phl t phl t plh v oh v oh v ol v ol 1.5 v 1.5 v 3 v 0 v 1.5 v 1.5 v input 1.5 v output control output waveform 1 s1 at 7 v (see note b) output waveform 2 s1 at open (see note b) v ol v oh t pzl t pzh t plz t phz 1.5 v 1.5 v 3.5 v 0 v 1.5 v v ol + 0.3 v 1.5 v v oh 0.3 v 0 v 3 v voltage waveforms enable and disable times low- and high-level enabling output output t plh /t phl t plz /t pzl t phz /t pzh open 7 v open test s1 output control notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 w , t r 2.5 ns, t f 2.5 ns. d. the outputs are measured one at a time with one transition per measurement. 1.5 v figure 1. load circuit and voltage waveforms
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (acritical applicationso). ti semiconductor products are not designed, authorized, or warranted to be suitable for use in life-support devices or systems or other critical applications. inclusion of ti products in such applications is understood to be fully at the customer's risk. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 1998, texas instruments incorporated
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